SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 444

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

26.10.5
Table 26-6.
444
444
Coded Value
setup [5:0]
pulse [6:0]
cycle [8:0]
SAM3X/A
SAM3X/A
Coding Timing Parameters
Coding and Range of Timing Parameters
Number of Bits
Figure 26-12. WRITE_MODE = 0. The write operation is controlled by NCS
All timing parameters are defined for one chip select and are grouped together in one
SMC_REGISTER according to their type.
Table 26-6
• The SMC_SETUP register groups the definition of all setup parameters: NRD_SETUP,
• The SMC_PULSE register groups the definition of all pulse parameters: NRD_PULSE,
• The SMC_CYCLE register groups the definition of all cycle parameters: NRD_CYCLE,
NCS_RD_SETUP, NWE_SETUP, NCS_WR_SETUP
NCS_RD_PULSE, NWE_PULSE, NCS_WR_PULSE
NWE_CYCLE
6
7
9
NWR0, NWR1
NBS0, NBS1,
A0, A1
D[15:0]
A [23:2]
NWE,
shows how the timing parameters are coded and their permitted range.
MCK
NCS
256 x cycle[8:7] + cycle[6:0]
128 x setup[5] + setup[4:0]
256 x pulse[6] + pulse[5:0]
Effective Value
Coded Value
0
0
0
127
31
63
Permitted Range
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Effective Value
256
512
768
128
256
256+127
512+127
768+127
128+31
256+63