SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 468

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

Figure 26-33. Write Enable Timing for NAND Flash Device Data Input Mode.
468
468
ale
mck
wen
SAM3X/A
SAM3X/A
Use NWE_SETUP, NWE_PULSE and NWE_CYCLE to define the write enable waveform
according to datasheet of the device.
Use TADL field in the SMC_TIMINGS register to configure the timing between the last address
latch cycle and the first rising edge of WEN for data input.
Figure 26-32. Write Enable Timing Configuration
Use NRD_SETUP, NRD_PULSE and NRD_CYCLE to define the read enable waveform accord-
ing to the datasheet of the device.
Use TAR field in the SMC_TIMINGS register to configure the timings between address latch
enable falling edge to read enable falling edge.
Use TCLR field in the SMC_TIMINGS register to configure the timings between the command
latch enable falling edge to the read enable falling edge.
• Write enable Configuration
• Read Enable Configuration
mck
wen
t
WEN_SETUP
t
t
ADL
t
WEN_PULSE
WEN_CYCLES
t
WEN_HOLD
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12