SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1076

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

39.5.1.5
39.5.1.6
1076
1076
Device mode
Host mode
SAM3X/A
SAM3X/A
Speed Control
DPRAM Management
When the USB interface is in device mode, the speed selection (full-speed or high-speed) is per-
formed automatically by the UOTGHS during the USB reset according to the host speed
capability. At the end of the USB reset, the UOTGHS enables or disables high-speed termina-
tions and pull-up.
It is possible to restraint the UOTGHS to full-speed or low-speed mode by handling the
UOTGHS_DEVCTRL.LS and the Speed Configuration (UOTGHS_DEVCTRL.SPDCONF) bits in
UOTGHS_DEVCTRL.
When the USB interface is in host mode, internal pull-down resistors are connected on both D+
and D- and the interface detects the speed of the connected device, which is reflected by the
Speed Status (UOTGHS_SR.SPEED) field.
Pipes and endpoints can only be allocated in ascending order, from the pipe/endpoint 0 to the
last pipe/endpoint to be allocated. The user shall therefore configure them in the same order.
The allocation of a pipe/endpoint x starts when the Endpoint Memory Allocate bit in the Endpoint
x Configuration register (UOTGHS_DEVEPTCFGx.ALLOC) is written to one. Then, the hard-
ware allocates a memory area in the DPRAM and inserts it between the x - 1 and x+ 1
pipes/endpoints. The x+1 pipe/endpoint memory window slides up and its data is lost. Note that
the following pipe/endpoint memory windows (from x+2) do not slide.
Disabling a pipe, by writing a zero to the Pipe x Enable bit in the Pipe Enable/Reset register
(UOTGHS_HSTPIP.PENx), or disabling an endpoint, by writing a zero to the Endpoint x Enable
bit in the Device Endpoint register (UOTGHS_DEVEPT.EPENx), resets neither the
UOTGHS_DEVEPTCFGx.ALLOC bit nor its configuration:
To free its memory, the user shall write a zero to the UOTGHS_DEVEPTCFGx.ALLOC bit. The
x+1 pipe/endpoint memory window then slides down and its data is lost. Note that the following
pipe/endpoint memory windows (from x+2) do not slide.
• the Pipe Banks (UOTGHS_HSTPIPCFGx.PBK) field,
• the Endpoint Banks (UOTGHS_DEVEPTCFGx.EPBK) field,
the Pipe Size (UOTGHS_HSTPIPCFGx.PSIZE) field,
the Pipe Token (UOTGHS_HSTPIPCFGx.PTOKEN) field,
the Pipe Type (UOTGHS_HSTPIPCFGx.PTYPE) field,
the Pipe Endpoint Number (UOTGHS_HSTPIPCFGx.PEPNUM) field,
and the Pipe Interrupt Request Frequency (UOTGHS_HSTPIPCFGx.INTFRQ) field;
the Endpoint Size (UOTGHS_DEVEPTCFGx. EPSIZE) field,
the Endpoint Direction (UOTGHS_DEVEPTCFGx.EPDIR) field,
and the Endpoint Type (UOTGHS_DEVEPTCFGx.EPTYPE) field.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12