SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 401
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 401 of 1465
- Download datasheet (26Mb)
24.8.3
24.8.3.1
24.8.3.2
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
NOR Flash on NCS0
Hardware Configuration
Software Configuration
A[1..22]
NRST
NWE
NCS0
NRD
D[0..15]
The default configuration for the Static Memory Controller, byte select mode, 16-bit data bus,
Read/Write controlled by Chip Select, allows access on 16-bit non-volatile memory at slow
clock.
For another configuration, configure the Static Memory Controller CS0 Setup, Pulse, Cycle and
Mode depending on Flash timings and system bus frequency.
• Address lines A[1..22], NCS0, NRD, NWE and data lines D[0..15] are multiplexed with PIO
lines and thus dedicated PIOs must be programmed in peripheral mode in the PIO controller.
3V3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
25
24
23
22
21
20
19
18
48
17
16
15
10
12
11
14
13
26
28
8
7
6
5
4
3
2
1
9
U1
U1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
RESET
WE
WP
VPP
CE
OE
TSOP48 PACKAGE
AT49BV6416
AT49BV6416
VCCQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VCC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VSS
VSS
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
47
37
46
27
C1
C1
100NF
100NF
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
3V3
100NF
100NF
C2
C2
SAM3X/A
SAM3X/A
401
401
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