SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 934

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

934
934
SAM3X/A
SAM3X/A
The following flowchart
tiple block transfers with the DMA Controller. Polling or interrupt method can be used to wait for
the end of write according to the contents of the Interrupt Mask Register (HSMCI_IMR).
Figure 37-11. Read Multiple Block and Write Multiple Block
Notes:
1. It is assumed that this command has been correctly sent (see
2. Handle errors reported in HSMCI_SR.
READ_MULTIPLE_BLOCK command (1)
Configure the HDMA channel X
DMAC_SADDRx and DMAC_DADDRx
DMAC_BTSIZE = BlockLength/4
Read status register DMAC_EBCISR
Send SET_BLOCKLEN command (1)
Send WRITE_MULTIPLE_BLOCK or
Send SELECT/DESELECT_CARD
(Figure
Read status register HSMCI_SR
Set the block length
HSMCI_MR |= (BlockLength << 16)
Set the DMAEN bit
HSMCI_DMA |= DMAEN
command (1) to select the card
Send STOP_TRANSMISSION
and Poll Bit FIFOEMPTY
DMAC_CHEN[X] = TRUE
and Poll Bit CBTC[X]
New Buffer ?
XFRDONE = 1
37-11) shows how to manage read multiple block and write mul-
command (1)
RETURN
Poll the bit
No
Yes
(2)
Yes
No
Figure
37-8).
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12