SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1144

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

39.6.2.14
Name:
Address:
Access:
• STALLRQ: STALL Request
This bit is set when UOTGHS_DEVEPTIERx.STALLRQS bit is written to one. This will request to send a STALL handshake
to the host.
This bit is cleared when a new SETUP packet is received or when the UOTGHS_DEVEPTIDRx.STALLRQC bit is written to
zero.
• RSTDT: Reset Data Toggle
This bit is set when UOTGHS_DEVEPTIERx.RSTDTS bit is written to one. This will clear the data toggle sequence, i.e., set
to Data0 the data toggle sequence of the next sent (IN endpoints) or received (OUT endpoints) packet.
This bit is cleared instantaneously.
The user does not have to wait for this bit to be cleared.
• NYETDIS: NYET Token Disable
This bit is set when UOTGHS_DEVEPTIERx.NYETDISS bit is written to one. This will send a ACK handshake instead of a
NYET handshake in high-speed mode.
This bit is cleared when the UOTGHS_DEVEPTIDRx.NYETDISC bit is written to one.This will let the UOTGHS handling
the high-speed handshake following the USB 2.0 standard.
• EPDISHDMA: Endpoint Interrupts Disable HDMA Request
This bit is set when the UOTGHS_DEVEPTIERx.EPDISHDMAS is written to one. This will pause the on-going DMA chan-
nel x transfer on any Endpoint x interrupt (PEP_x), whatever the state of the Endpoint x Interrupt Enable bit (PEP_x).
The user then has to acknowledge or to disable the interrupt source (e.g. UOTGHS_DEVEPTISRx.RXOUTI) or to clear the
EPDISHDMA bit (by writing a one to UOTGHS_DEVEPTIDRx.EPDISHDMAC bit) in order to complete the DMA transfer.
In ping-pong mode, if the interrupt is associated to a new system-bank packet (e.g. Bank1) and the current DMA transfer is
running on the previous packet (Bank0), then the previous-packet DMA transfer completes normally, but the new-packet
DMA transfer will not start (not requested).
If the interrupt is not associated to a new system-bank packet (UOTGHS_DEVEPTISRx.NAKINI, NAKOUTI, etc.), then the
request cancellation may occur at any time and may immediately pause the current DMA transfer.
This may be used for example to identify erroneous packets, to prevent them from being transferred into a buffer, to com-
plete a DMA transfer by software after reception of a short packet, etc.
1144
1144
SHORTPACKETE
31
23
15
–
–
–
7
SAM3X/A
SAM3X/A
Device Endpoint x Mask Register
UOTGHS_DEVEPTIMRx [x=0..9]
0x400AC1C0
Read-only
STALLEDE/
CRCERRE
FIFOCON
30
22
14
–
–
6
OVERFE
KILLBK
29
21
13
–
–
5
HBISOFLUSHE
NBUSYBKE
NAKINE/
28
20
12
–
–
4
HBISOINERRE
NAKOUTE/
STALLRQ
27
19
11
–
–
3
ERRORTRANSE
UNDERFE
RXSTPE/
RSTDT
26
18
10
–
2
NYETDIS
RXOUTE
DATAXE
25
17
–
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
EPDISHDMA
MDATAE
TXINE
24
16
–
8
0