SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 827

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

Figure 35-51. Slave Node Configuration, NACT = IGNORE
35.7.8.16
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Master Node Configuration
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
Read
Read
LIN Frame Handling With The PDC
Break
The USART can be used in association with the PDC in order to transfer data directly into/from
the on- and off-chip memories without any processor intervention.
The PDC uses the trigger flags, TXRDY and RXRDY, to write or read into the USART. The PDC
always writes in the Transmit Holding register (US_THR) and it always reads in the Receive
Holding register (US_RHR). The size of the data written or read by the PDC in the USART is
always a byte.
The user can choose between two PDC modes by the PDCM bit in the LIN Mode register
(US_LINMR):
The WRITE buffer also contains the Identifier and the DATA, if the USART sends the response
(NACT = PUBLISH).
The READ buffer contains the DATA if the USART receives the response (NACT =
SUBSCRIBE).
Synch
• PDCM = 1: the LIN configuration is stored in the WRITE buffer and it is written by the PDC in
• PDCM = 0: the LIN configuration is not stored in the WRITE buffer and it must be written by
the Transmit Holding register US_THR (instead of the LIN Mode register US_LINMR).
Because the PDC transfer size is limited to a byte, the transfer is split into two accesses.
During the first access the bits, NACT, PARDIS, CHKDIS, CHKTYP, DLM and FSDIS are
written. During the second access the 8-bit DLC field is written.
the user in the LIN Mode register (US_LINMR).
Protected
Identifier
Data 1
Data N-1
Data N
Checksum
SAM3X/A
SAM3X/A
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