SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1160

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

39.6.3
39.6.3.1
Name:
Address:
Access:
• SPDCONF: Mode Configuration
This field contains the host speed capability:.
• RESUME: Send USB Resume
Writing a one to this bit will generate a USB Resume on the USB bus.
This bit is cleared when the USB Resume has been sent or when a USB reset is requested.
Writing a zero to this bit has no effect.
This bit should be written to one only when the start of frame generation is enable. (SOFE bit is one).
• RESET: Send USB Reset
Writing a one to this bit will generate a USB Reset on the USB bus.
This bit is cleared when the USB Reset has been sent.
It may be useful to write a zero to this bit when a device disconnection is detected (UOTGHS_HSTISR.DDISCI is one)
whereas a USB Reset is being sent.
• SOFE: Start of Frame Generation Enable
Writing a one to this bit will generate SOF on the USB bus in full or high speed mode and keep alive in low speed mode.
Writing a zero to this bit will disable the SOF generation and to leave the USB bus in idle state.
This bit is set when a USB reset is requested or an upstream resume interrupt is detected (UOTGHS_HSTISR.TXRSMI).
1160
1160
31
23
15
Value
–
–
–
7
–
0
1
2
3
SAM3X/A
SAM3X/A
USB Host Registers
Host General Control Register
UOTGHS_HSTCTRL
0x400AC400
Read-write
Name
LOW_POWER
HIGH_SPEED
FORCED_FS
30
22
14
–
–
–
6
–
NORMAL
29
21
13
–
–
5
–
Description
The host starts in full-speed mode and performs a high-speed reset to switch to the high-
speed mode if the downstream peripheral is high-speed capable.
For a better consumption, if high-speed is not needed.
Forced high speed.
The host remains to full-speed mode whatever the peripheral speed capability.
SPDCONF
28
20
12
–
–
4
–
27
19
11
–
–
–
3
–
RESUME
26
18
10
–
–
2
–
RESET
25
17
–
–
9
1
–
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
SOFE
24
16
–
–
8
0
–