SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 358

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

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358
SAM3X/A
SAM3X/A
Note:
Note:
10. Program the DMAC_DSCRx register with DMAC_DSCRx(0), the pointer to the first
11. Finally, enable the channel by writing a ‘1’ to the DMAC_CHER.ENAx bit, where x is the
12. The DMAC fetches the first LLI from the location pointed to by DMAC_DSCRx(0).
13. Source and destination request single and chunk DMAC transactions to transfer the
14. Once the buffer of data is transferred, the DMAC_CTRLAx register is written out to sys-
15. The DMAC does not wait for the buffer interrupt to be cleared, but continues fetching
Linked List item.
channel number. The transfer is performed.
buffer of data (assuming non-memory peripheral). The DMAC acknowledges at the
completion of every transaction (chunk and single) in the buffer and carries out the buf-
fer transfer.
tem memory at the same location and on the same layer where it was originally
fetched, that is, the location of the DMAC_CTRLAx register of the linked list item
fetched prior to the start of the buffer transfer. Only DMAC_CTRLAx register is written
out because only the DMAC_CTRLAx.BTSIZE and DMAC_CTRLAX.DONE bits have
been updated by DMAC hardware. Additionally, the DMAC_CTRLAx.DONE bit is
asserted when the buffer transfer has completed.
the next LLI from the memory location pointed to by current DMAC_DSCRx register
and automatically reprograms the DMAC_SADDRx, DMAC_DADDRx, DMAC_DSCRx,
DMAC_CTRLAx and DMAC_CTRLBx channel registers. The DMAC transfer continues
until the DMAC determines that the DMAC_CTRLBx and DMAC_DSCRx registers at
the end of a buffer transfer match described in Row 1 of
DMAC then knows that the previous buffer transferred was the last buffer in the DMAC
transfer. The DMAC transfer might look like that shown in
The LLI.DMAC_SADDRx, LLI. DMAC_DADDRx, LLI.DMAC_DSCRx, LLI.DMAC_CTRLAx and
LLI.DMAC_CTRLBx registers are fetched. The DMAC automatically reprograms the
DMAC_SADDRx, DMAC_DADDRx, DMAC_DSCRx, DMAC_CTRLBx and DMAC_CTRLAx chan-
nel registers from the DMAC_DSCRx(0).
Do not poll the DMAC_CTRLAx.DONE bit in the DMAC memory map. Instead, poll the
LLI.DMAC_CTRLAx.DONE bit in the LLI for that buffer. If the poll LLI.DMAC_CTRLAx.DONE bit is
asserted, then this buffer transfer has completed. This LLI.DMAC_CTRLAx.DONE bit was cleared
at the start of the transfer.
Table 23-4 on page
Figure 23-5 on page
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
355. The
359.