SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 955
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 955 of 1465
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37.14.3
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• DTOCYC: Data Timeout Cycle Number
These fields determine the maximum number of Master Clock cycles that the HSMCI waits between two data block trans-
fers. It equals (DTOCYC x Multiplier).
• DTOMUL: Data Timeout Multiplier
Multiplier is defined by DTOMUL as shown in the following table:
If the data time-out set by DTOCYC and DTOMUL has been exceeded, the Data Time-out Error flag (DTOE) in the HSMCI
Status Register (HSMCI_SR) raises.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
–
–
7
–
Value
HSMCI Data Timeout Register
0
1
2
3
4
5
6
7
HSMCI_DTOR
0x40000008
Read-write
30
22
14
–
–
–
6
DTOMUL
1048576
Name
65536
1024
4096
29
21
13
128
256
–
–
–
5
16
1
28
20
12
–
–
–
4
Description
DTOCYC
DTOCYC x 16
DTOCYC x 128
DTOCYC x 256
DTOCYC x 1024
DTOCYC x 4096
DTOCYC x 65536
DTOCYC x 1048576
“HSMCI Write Protect Mode Register” on page
27
19
11
–
–
–
3
26
18
10
–
–
–
2
DTOCYC
25
17
–
–
9
–
1
SAM3X/A
SAM3X/A
978.
24
16
–
–
8
–
0
955
955
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