SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1246
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
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40.9.6
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
Any modification on one of the fields of the CAN_BR register must be done while CAN module is disabled.
To compute the different Bit Timings, please refer to the
• PHASE2: Phase 2 segment
This phase is used to compensate the edge phase error.
Warning: PHASE2 value must be different from 0.
• PHASE1: Phase 1 segment
This phase is used to compensate for edge phase error.
• PROPAG: Programming time segment
This part of the bit time is used to compensate for the physical delay times within the network.
• SJW: Re-synchronization jump width
To compensate for phase shifts between clock oscillators of different controllers on bus. The controller must re-synchronize
on any relevant signal edge of the current transmission. The synchronization jump width defines the maximum of clock
cycles a bit period may be shortened or lengthened by re-synchronization.
• BRP: Baudrate Prescaler.
This field allows user to program the period of the CAN system clock to determine the individual bit timing.
The BRP field must be within the range [1, 0x7F], i.e., BRP = 0 is not authorized.
1246
1246
31
23
15
–
–
–
7
–
SAM3X/A
SAM3X/A
CAN Baudrate Register
t
CAN_BR
0x400B4014 (0), 0x400B8014 (1)
Read-write
t
t
t
t
CSC
PHS2
PHS1
PRS
SJW
=
=
=
=
=
30
22
14
t
–
–
6
t
BRP
CSC
CSC
t
t
CSC
CSC
+
1
PROPAG
SJW
PHASE2
PHASE1
PHASE1
MCK
+
29
21
13
–
5
1
+
+
+
1
1
1
SJW
28
20
12
–
4
Section 40.7.4.1 “CAN Bit Timing Configuration” on page
”CAN Write Protection Mode
BRP
27
19
11
–
–
3
–
26
18
10
–
2
Register”.
PROPAG
PHASE2
25
17
–
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
SMP
24
16
1213.
8
0
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