SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1096

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

39.5.3.6
39.5.3.7
1096
1096
SAM3X/A
SAM3X/A
Pipe Activation
Address Setup
In the end, the user has to write a zero to the UOTGHS_HSTPIP.PRSTx bit to complete the
reset operation and to start using the FIFO.
The pipe is maintained inactive and reset (see
d i s a b l e d ( U O T G H S _ H S T P I P . P E N x i s z e r o ) . T h e D a t a T o g g l e S e q u e n c e f i e l d
(UOTGHS_HSTPIPISRx.DTSEQ) is also reset.
The algorithm represented on
pipe.
Figure 39-23. Pipe Activation Algorithm
As long as the pipe is not correctly configured (UOTGHS_HSTPIPISRx.CFGOK is zero), the
controller cannot send packets to the device through this pipe.
The UOTGHS_HSTPIPISRx.CFGOK bit is only set if the configured size and number of banks
are correct as compared to their maximal allowed values for the pipe (see
1067) and to the maximal FIFO size (i.e. the DPRAM size).
See
Once the pipe is correctly configured (UOTGHS_HSTPIPISRx.CFGOK is one), only the
UOTGHS_HSTPIPCFGx.PTOKEN and UOTGHS_HSTPIPCFGx.INTFRQ fields can be written
by software. UOTGHS_HSTPIPCFGx.INTFRQ is meaningless for non-interrupt pipes.
When starting an enumeration, the user gets the device descriptor by sending a
GET_DESCRIPTOR USB request. This descriptor contains the maximal packet size of the
device default control endpoint (bMaxPacketSize0) and the user re-configures the size of the
default control pipe with this size parameter.
Once the device has answered the first host requests with default device address 0, the host
assigns a new address to the device. The host controller has to send a USB reset to the device
Section 39.5.1.6
UOTGHS_HSTPIPISRx.CFGOK == 1?
UOTGHS_HSTPIPPCFGx
UOTGHS_HSTPIP.PENx = 1
for more details about DPRAM management.
Pipe Activated
Yes
Activation
.ALLOC
Figure 39-23 on page 1096
.PBK
.PTOKEN
.PSIZE
.INTFRQ
.PEPNUM
.PTYPE
Pipe
No
Section 39.5.3.5
ERROR
Enable the pipe.
Configure the pipe:
Allocate the configured DPRAM banks
Test if the pipe configuration is
correct.
- interrupt request frequency
- endpoint number
- type
- size
- number of banks
must be followed in order to activate a
for more details) as long as it is
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Table 39-1 on page