SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 460

• Manufacturer Part Number: SAM3A4C
• Manufacturer: Atmel Corporation

26.15 Slow Clock Mode
26.15.1
Figure 26-28. Read/Write Cycles in Slow Clock Mode
460
460
NBS0, NBS1,
SAM3X/A
SAM3X/A
Slow Clock Mode Waveforms
A[23:2]
A0,A1
NWE
MCK
NCS
The SMC is able to automatically apply a set of “slow clock mode” read/write waveforms when
an internal signal driven by the Power Management Controller is asserted because MCK has
been turned to a very slow clock rate (typically 32 kHz clock rate). In this mode, the user-pro-
grammed waveforms are ignored and the slow clock mode waveforms are applied. This mode is
provided so as to avoid reprogramming the User Interface with appropriate waveforms at very
slow clock rate. When activated, the slow mode is active on all chip selects.
Figure 26-28
chip selects.
Table 26-8.
SLOW CLOCK MODE WRITE
1
Read Parameters
NRD_SETUP
NRD_PULSE
NCS_RD_SETUP
NCS_RD_PULSE
NRD_CYCLE
NWE_CYCLE = 3
1
Table 26-8
illustrates the read and write operations in slow clock mode. They are valid on all
Read and Write Timing Parameters in Slow Clock Mode
1
indicates the value of read and write parameters in slow clock mode.
Duration (cycles)
1
1
0
2
2
NBS0, NBS1,
Write Parameters
NWE_SETUP
NWE_PULSE
NCS_WR_SETUP
NCS_WR_PULSE
NWE_CYCLE
A[23:2]
A0,A1
MCK
NRD
NCS
SLOW CLOCK MODE READ
NRD_CYCLE = 2
1
Duration (cycles)
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
1
1
0
3
3