adsp-21478 Analog Devices, Inc., adsp-21478 Datasheet - Page 16

• Manufacturer Part Number: adsp-21478
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

ADSP-21478/ADSP-21479
Table 9. Pin Descriptions (Continued)
Name
MLBCLK
MLBDAT
MLBSIG
MLBDO
MLBSO
SR_SCLK
SR_CLR
SR_SDI
SR_SDO
SR_LAT
SR_LDO
RTXI
RTXO
RTCLKOUT
TDI
TDO
TMS
TCK
TRST
EMU
The following symbols appear in the Type column of
O/D = open drain, and T = three-state, ipd = internal pull-down resistor, ipu = internal pull-up resistor.
The internal pull-up (ipu) and internal pull-down (ipd) resistors are designed to hold the internal path from the pins at the expected logic
levels. To pull-up or pull-down the external pads to the expected logic levels, use external resistors. Internal pull-up/pull-down resistors
cannot be enabled/disabled and the value of these resistors cannot be programmed. The range of an ipu resistor can be between 26k–63kΩ.
The range of an ipd resistor can be between 31k–85kΩ.
In this table, all pins are LVTTL compliant with the exception of the thermal diode, shift register, and real-time clock (RTC) pins.
Not all pins are available in the 100-lead LQFP package. For more information, see
3
3
3
1
17–0
3
Type
I
I/O/T in 3 pin
mode. I in 5 pin
mode.
I/O/T in 3 pin
mode. I in 5 pin
mode
O/T
O/T
I (ipu)
I (ipu)
I (ipu)
O (ipu)
I (ipu)
O/T (ipu)
I
O
O (ipd)
I (ipu)
O/T
I (ipu)
I
I (ipu)
O/T (ipu)
State During/
After Reset
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Rev. PrB | Page 16 of 70 | March 2010
Table
Description
Media Local Bus Clock. This clock is generated by the MLB controller that is
synchronized to the MOST network and provides the timing for the entire MLB
interface at 49.152 MHz at Fs=48 kHz. When the MLB controller is not used, this
pin should be grounded.
Media Local Bus Data. The MLBDAT line is driven by the transmitting MLB device
and is received by all other MLB devices including the MLB controller. The
MLBDAT line carries the actual data. In 5-pin MLB mode, this pin is an input only.
When the MLB controller is not used, this pin should be grounded.
Media Local Bus Signal. This is a multiplexed signal which carries the
Channel/Address generated by the MLB Controller, as well as the Command and
RxStatus bytes from MLB devices. In 5-pin mode, this pin is input only. When the
MLB controller is not used, this pin should be grounded.
Media Local Bus Data Output (in 5 pin mode). This pin is used only in 5-pin MLB
mode. This serves as the output data pin in 5-pin mode. When the MLB controller
is not used, this pin can be left floating.
Media Local Bus Signal Output (in 5 pin mode). This pin is used only in 5-pin
MLB mode. This serves as the output signal pin in 5-pin mode. When the MLB
controller is not used, this pin can be left floating.
Shift Register Serial Clock. (Active high, rising edge sensitive)
Shift Register Reset. (Active LOW)
Shift Register Serial Data Input.
Shift Register Serial Data Output.
Shift Register Latch Clock Input. (Active high, rising edge sensitive)
Shift Register Parallel Data Output.
RTC Crystal Input.
RTC Crystal Output.
RTC Clock Output. For calibration purposes. The clock runs at 1 Hz.
Test Data Input (JTAG). Provides serial data for the boundary scan logic.
Test Data Output (JTAG). Serial scan output of the boundary scan path.
Test Mode Select (JTAG). Used to control the test state machine.
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted
(pulsed low) after power-up or held low for proper operation of the device.
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed
low) after power-up or held low for proper operation of the processor.
Emulation Status. Must be connected to the ADSP-2147x Analog Devices DSP
Tools product line of JTAG emulators target board connector only.
9: A = asynchronous, I = input, O = output, S = synchronous, A/D = active drive,
Preliminary Technical Data
Table 2 on Page 3
and
Table 53 on Page
64.