adsp-21478 Analog Devices, Inc., adsp-21478 Datasheet - Page 61

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adsp-21478

Manufacturer Part Number
adsp-21478
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
OUTPUT DRIVE CURRENTS
Figure 49
ers of the ADSP-2147x. The curves represent the current drive
capability of the output drivers as a function of output voltage.
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
Table 16 on Page 25
output disable time, output enable time, and capacitive loading.
The timing specifications for the SHARC apply for the voltage
reference levels in
Timing is measured on signals when they cross the 1.5 V level as
described in
sured between the point that the first signal reaches 1.5 V and
the point that the second signal reaches 1.5 V.
12
10
8
6
4
2
0
V
0
LOAD
NOTES:
THE WORST CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED
FOR THE OUTPUT TIMING ANALYSIS TO REFELECT THE TRANSMISSION LINE
EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD), IS FOR
LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.
ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN
SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM MAY INCORPORATE
EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.
4pF
Figure 50. Equivalent Device Loading for AC Measurements
shows typical I-V characteristics for the output driv-
Figure 49. Typical Drive at Junction Temperature
50Ω
Figure
50
70Ω
50Ω
400Ω
2pF
Figure
51. All delays (in nanoseconds) are mea-
through
TBD
(Includes All Fixtures)
100
50.
45Ω
0.5pF
TESTER PIN ELECTRONICS
Table 49 on Page
150
ZO = 50Ω (impedance)
TD = 4.04 ± 1.18 ns
T1
200
60. These include
OUTPUT
Rev. PrB | Page 61 of 70 | March 2010
DUT
250
CAPACITIVE LOADING
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
how output delays and holds vary with load capacitance. The
graphs of
outside the ranges shown for Typical Output Delay vs. Load
Capacitance and Typical Output Rise Time (20% to 80%,
V = Min) vs. Load Capacitance.
12
10
12
10
8
4
8
4
6
2
0
6
2
0
0
0
OUTPUT
Figure 51. Voltage Reference Levels for AC Measurements
INPUT
ADSP-21478/ADSP-21479
Figure 52. Typical Output Rise/Fall Time (20% to 80%,
Figure 53. Typical Output Rise/Fall Time (20% to 80%,
Figure
OR
50
50
1.5V
52,
Figure
Figure
TBD
TBD
100
100
V
V
DD_EXT
DD_EXT
53, and
50).
= Max)
= Min)
Figure 54
150
150
Figure 54
200
200
shows graphically
may not be linear
250
250
1.5V

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