adsp-21478 Analog Devices, Inc., adsp-21478 Datasheet - Page 53

• Manufacturer Part Number: adsp-21478
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Table 45. MLB Interface, 5-pin Specifications
1
2
3
Parameter
Five-Pin Characteristics
t
t
t
t
t
t
t
t
t
t
C
Pulse width variation is measured at 1.25 V by triggering on one edge of MLBCLK and measuring the spread on the other edge, measured in ns peak-to-peak (pp).
Gate Delays due to OR'ing logic on the pins must be accounted for.
When a node is not driving valid data onto the bus, the MLBSO and MLBDO output lines shall remain low. If the output lines can float at anytime, including while in reset,
MLBCLK
MCKL
MCKH
MCKR
MCKF
MPWV
DSMCF
DHMCF
MCDRV
MCRDL
external pull-down resistors are required to keep the outputs from corrupting the MediaLB signal lines when not being driven.
MLB
1
2
3
MLB Clock Period
MLBCLK Low Time
MLBCLK High Time
MLBCLK Rise Time (V
MLBCLK Fall Time (V
MLBCLK Pulse Width Variation
DAT/SIG Input Setup Time
DAT/SIG Input Hold Time
DS/DO Output Data Delay From MLBCLK Rising Edge
DO/SO Low From MLBCLK High
DS/DO Pin Load
512Fs
256Fs
512Fs
256Fs
512Fs
256Fs
512Fs
256Fs
(Tx, Output)
MLBCLK
MLBSIG/
MLBDAT
(Rx, Input)
MLBSIG/
MLBDAT
IH
IL
to V
to V
IL
IH
)
)
t
MCDRV
t
MCKR
Rev. PrB | Page 53 of 70 | March 2010
Figure 38. MLB Timing (3-Pin Interface)
t
MCKH
t
MCKF
t
t
MCFDZ
MLBCLK
t
VALID
DSMCF
VALID
t
MDZH
t
DHMCF
Min
15
30
15
30
3
5
t
MCKL
ADSP-21478/ADSP-21479
Typ
40
81
Max
6
6
2
8
10
20
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
nspp
ns
ns
ns
ns
ns
pf