mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 113

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

13.2.2 Data Direction Register A
MC68HC908QF4 — Rev. 1.0
MOTOROLA
NOTE:
NOTE:
Data direction register A (DDRA) determines whether each port A pin is an input or
an output. Writing a 1 to a DDRA bit enables the output buffer for the corresponding
port A pin; a 0 disables the output buffer.
DDRA[5:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before changing
data direction register A bits from 0 to 1.
Figure 13-4
Figure 13-4
When DDRAx is a 1, reading address $0000 reads the PTAx data latch. When
DDRAx is a 0, reading address $0000 reads the voltage level on the pin. The data
latch can always be written, regardless of the state of its data direction bit.
Address: $0004
These read/write bits control port A data direction. Reset clears DDRA[5:0],
configuring all port A pins as inputs.
Reset:
Read:
Write:
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Freescale Semiconductor, Inc.
For More Information On This Product,
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
Bit 7
shows the port A I/O logic.
does not apply to PTA2
R
R
0
Figure 13-3. Data Direction Register A (DDRA)
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= Reserved
Input/Output (I/O) Ports
R
6
0
RESET
Figure 13-4. Port A I/O Circuit
DDRA5
5
0
DDRA4
DDRAx
PTAx
4
0
= Unimplemented
DDRA3
3
0
TO KEYBOARD INTERRUPT CIRCUIT
2
0
0
PTAPUEx
Input/Output (I/O) Ports
DDRA1
1
0
30 k
Data Sheet
DDRA0
Bit 0
PTAx
Port A
0
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