mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 147

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
15.9 Input/Output Registers
15.9.1 TIM Status and Control Register
MC68HC908QF4 — Rev. 1.0
MOTOROLA
The following I/O registers control and monitor operation of the TIM:
The TIM status and control register (TSC) does the following:
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
Address: $0020
This read/write flag is set when the TIM counter reaches the modulo value
programmed in the TIM counter modulo registers. Clear TOF by reading the TIM
status and control register when TOF is set and then writing a 0 to TOF. If
another TIM overflow occurs before the clearing sequence is complete, then
writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF
has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit becomes
set. Reset clears the TOIE bit.
Reset:
Read:
Write:
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
TIM status and control register (TSC)
TIM counter registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0 and TSC1)
TIM channel registers (TCH0H:TCH0L and TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 7
TOF
Figure 15-5. TIM Status and Control Register (TSC)
0
0
Go to: www.freescale.com
Timer Interface Module (TIM)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
Timer Interface Module (TIM)
PS2
2
0
Input/Output Registers
PS1
1
0
Data Sheet
Bit 0
PS0
0
147

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