mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 146

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
15.7 TIM During Break Interrupts
15.8 Input/Output Signals
15.8.1 TIM Clock Pin (PTA2/TCLK)
15.8.2 TIM Channel I/O Pins (PTA0/TCH0 and PTA1/TCH1)
Data Sheet
146
A break interrupt stops the TIM counter.
The system integration module (SIM) controls whether status bits in other modules
can be cleared during the break state. The BCFE bit in the break flag control
register (BFCR) enables software to clear status bits during the break state. See
16.2.2.5 Break Flag Control Register.
To allow software to clear status bits during a break interrupt, write a 1 to the BCFE
bit. If a status bit is cleared during the break state, it remains cleared when the MCU
exits the break state.
To protect status bits during the break state, write a 0 to the BCFE bit. With BCFE
at 0 (its default state), software can read and write I/O registers during the break
state without affecting status bits. Some status bits have a two-step read/write
clearing procedure. If software does the first step on such a bit before the break,
the bit cannot change during the break state as long as BCFE is at 0. After the
break, doing the second step clears the status bit.
Port A shares three of its pins with the TIM. Two TIM channel I/O pins are
PTA0/TCH0 and PTA1/TCH1 and an alternate clock source is PTA2/TCLK.
PTA2/TCLK
counter instead of the prescaled internal bus clock. Select the PTA2/TCLK input
by writing 1s to the three prescaler select bits, PS[2–0]. (See
and Control
input regardless of port pin initialization.
Each channel I/O pin is programmable independently as an input capture pin or an
output compare pin. PTA0/TCH0 can be configured as a buffered output compare
or buffered PWM pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
is an external clock input that can be the clock source for the TIM
Register.) When the PTA2/TCLK pin is the TIM clock input, it is an
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Timer Interface Module (TIM)
MC68HC908QF4 — Rev. 1.0
15.9.1 TIM Status
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