mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 150

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
15.9.4 TIM Channel Status and Control Registers
Data Sheet
150
Each of the TIM channel status and control registers does the following:
CHxF — Channel x Flag Bit
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Address: $0025
Address: $0028
When channel x is an input capture channel, this read/write bit is set when an
active edge occurs on the channel x pin. When channel x is an output compare
channel, CHxF is set when the value in the TIM counter registers matches the
value in the TIM channel x registers.
Clear CHxF by reading the TIM channel x status and control register with CHxF
set and then writing a 0 to CHxF. If another interrupt request occurs before the
clearing sequence is complete, then writing a 0 to CHxF has no effect.
Therefore, an interrupt request cannot be lost due to inadvertent clearing of
CHxF.
Reset clears the CHxF bit. Writing a 1 to CHxF has no effect.
Reset:
Reset:
Read:
Read:
Write:
Write:
1 = Input capture or output compare on channel x
0 = No input capture or output compare on channel x
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture
trigger
Selects output toggling on TIM overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Freescale Semiconductor, Inc.
For More Information On This Product,
CH0F
CH1F
Bit 7
Bit 7
0
0
0
0
Figure 15-8. TIM Channel Status and Control
Go to: www.freescale.com
Timer Interface Module (TIM)
TSC0
TSC1
= Unimplemented
CH0IE
CH1IE
6
0
6
0
Registers (TSC0:TSC1)
MS0B
5
0
5
0
0
MS0A
MS1A
4
0
4
0
ELS0B
ELS1B
3
0
3
0
ELS0A
ELS1A
MC68HC908QF4 — Rev. 1.0
2
0
2
0
TOV0
TOV1
1
0
1
0
MOTOROLA
CH0MAX
CH1MAX
Bit 0
Bit 0
0
0