mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 53

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MC68HC908QF4 — Rev. 1.0
MOTOROLA
NOTE:
NOTE:
LVIRSTD — LVI Reset Disable Bit
LVIPWRD — LVI Power Disable Bit
LVDLVR — Low Voltage Detect or Low Voltage Reset Mode Bit
The LVDLVR bit is cleared by a power-on reset (POR) only. Other resets will leave
this bit unaffected.
SSREC — Short Stop Recovery Bit
Exiting stop mode by an LVI reset will result in the long stop recovery.
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
LVIRSTD disables the reset signal from the LVI module. Unlike other
configuration bits, the LVIRSTD can be written at any time.
LVIPWRD disables the LVI module.
LVDLVR selects the trip voltage of the LVI module. LVD trip voltage can be used
as a low voltage warning, while LVR will commonly be used as a reset condition.
Unlike other CONFIG bits, LVDLVR can be written multiple times after reset.
SSREC enables the CPU to exit stop mode with a delay of 32 BUSCLKX4
cycles instead of a 4096 BUSCLKX4 cycle delay.
When using the LVI during normal operation but disabling during stop mode, the
LVI will have an enable time of t
reset and long stop recovery (both 4096 BUSCLKX4 cycles) gives a delay
longer than the LVI enable time for these startup scenarios. There is no period
where the MCU is not protected from a low-power condition. However, when
using the short stop recovery configuration option, the 32 BUSCLKX4 delay
must be greater than the LVI’s turn on time to avoid a period in startup where
the LVI is not protecting the MCU.
STOP enables the STOP instruction.
COPD disables the COP module.
1 = LVI module resets disabled
0 = LVI module resets enabled
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI trip voltage level set to LVD trip voltage
0 = LVI trip voltage level set to LVR trip voltage
1 = Stop mode recovery after 32 BUSCLKX4 cycles
0 = Stop mode recovery after 4096 BUSCLKX4 cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Freescale Semiconductor, Inc.
For More Information On This Product,
Configuration Register (CONFIG)
Go to: www.freescale.com
EN
. The system stabilization time for power-on
Configuration Register (CONFIG)
Functional Description
Data Sheet
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