mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 169

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

16.3.1.4 Data Format
16.3.1.5 Break Signal
16.3.1.6 Baud Rate
MC68HC908QF4 — Rev. 1.0
MOTOROLA
Table 16-2
regarding vectors.
Communication with the monitor ROM is in standard non-return-to-zero (NRZ)
mark/space data format. Transmit and receive baud rates must be identical.
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor
receives a break signal, it drives the PTA0 pin high for the duration of two bits and
then echoes back the break signal.
The monitor communication baud rate is controlled by the frequency of the external
or internal oscillator and the state of the appropriate pins as shown in
Table 16-1
effective baud rate is the bus frequency divided by 256 when using an external
oscillator. When using the internal oscillator in forced monitor mode, the effective
baud rate is the bus frequency divided by 206.
User
Monitor
Modes
START
Freescale Semiconductor, Inc.
BIT
Vector High
For More Information On This Product,
0
$FFFE
$FEFE
summarizes the differences between user mode and monitor mode
also lists the bus frequencies to achieve standard baud rates. The
Reset
BIT 0
1
2
Go to: www.freescale.com
BIT 1
MISSING STOP BIT
3
Development Support
Vector Low
Figure 16-14. Monitor Data Format
$FEFF
Figure 16-15. Break Transaction
$FFFF
4
Reset
BIT 2
Table 16-2. Mode Difference
5
6
BIT 3
Vector High
7
$FFFC
$FEFC
Break
BIT 4
Functions
BIT 5
Vector Low
2-STOP BIT DELAY BEFORE ZERO ECHO
$FFFD
$FEFD
Break
BIT 6
0
1
BIT 7
2
Vector High
$FEFC
$FFFC
3
Monitor Module (MON)
STOP
Development Support
SWI
BIT
4
START
NEXT
5
BIT
Table
6
Vector Low
Data Sheet
$FEFD
$FFFD
SWI
7
16-1.
169