mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 155

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.1 Introduction
16.2 Break Module (BRK)
16.2.1 Functional Description
MC68HC908QF4 — Rev. 1.0
MOTOROLA
Data Sheet — MC68HC908QF4
This section describes the break module, the monitor read-only memory (MON),
and the monitor mode entry methods.
The break module can generate a break interrupt that stops normal program flow
at a defined address to enter a background program.
Features include:
When the internal address bus matches the value written in the break address
registers, the break module issues a breakpoint signal (BKPT) to the system
integration module (SIM). The SIM then causes the CPU to load the instruction
register with a software interrupt instruction (SWI). The program counter vectors to
$FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU generated address matches the contents of the break address
registers, the break interrupt is generated. A return-from-interrupt instruction (RTI)
in the break routine ends the break interrupt and returns the microcontroller unit
(MCU) to normal operation.
Figure 16-2
Figure 16-3
Accessible input/output (I/O) registers during the break Interrupt
Central processor unit (CPU) generated break interrupts
Software-generated break interrupts
Computer operating properly (COP) disabling during break interrupts
A CPU generated address (the address in the program counter) matches
the contents of the break address registers.
Software writes a 1 to the BRKA bit in the break status and control register.
Freescale Semiconductor, Inc.
For More Information On This Product,
shows the structure of the break module.
provides a summary of the I/O registers.
Go to: www.freescale.com
Development Support
Section 16. Development Support
Data Sheet
155

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