mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 114

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
13.2.3 Port A Input Pullup Enable Register
Data Sheet
114
1. X = don’t care
2. I/O pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
5. Output does not apply to PTA2
PTAPUE
Bit
1
0
X
DDRA
Bit
0
0
1
DD
by internal pullup.
The port A input pullup enable register (PTAPUE) contains a software configurable
pullup device for each if the six port A pins. Each bit is individually configurable and
requires the corresponding data direction register, DDRAx, to be configured as
input. Each pullup device is automatically and dynamically disabled when its
corresponding DDRAx bit is configured as output.
OSC2EN
PTAPUE[5:0] — Port A Input Pullup Enable Bits
Table 13-1
PTA
X
Bit
Address: $000B
This read/write bit configures the OSC2 pin function when internal oscillator or
RC oscillator option is selected. This bit has no effect for the XTAL or external
oscillator options.
These read/write bits are software programmable to enable pullup devices on
port A pins.
X
X
(1)
Reset:
Read:
Write:
1 = OSC2 pin outputs the internal or RC oscillator clock (BUSCLKX4)
0 = OSC2 pin configured for PTA4 I/O, having all the interrupt and pullup
1 = Corresponding port A pin configured to have internal pull if its DDRA bit
0 = Pullup device is disconnected on the corresponding port A pin regardless
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 13-5. Port A Input Pullup Enable Register (PTAPUE)
functions
is set to 0
of the state of its DDRA bit
Input, Hi-Z
— Enable PTA4 on OSC2 Pin
Input, V
OSC2EN
summarizes the operation of the port A pins.
Table 13-1. Port A Pin Functions
Bit 7
I/O Pin
Output
0
Mode
DD
Go to: www.freescale.com
(2)
(4)
= Unimplemented
Input/Output (I/O) Ports
6
0
Accesses to DDRA
PTAPUE5
DDRA5–DDRA0
DDRA5–DDRA0
DDRA5–DDRA0
5
0
Read/Write
PTAPUE4
4
0
PTAPUE3
3
0
PTA5–PTA0
Read
Pin
Pin
PTAPUE2
MC68HC908QF4 — Rev. 1.0
Accesses to PTA
2
0
PTAPUE1
PTA5–PTA0
PTA5–PTA0
PTA5–PTA0
1
0
Write
MOTOROLA
PTAPUE0
Bit 0
0
(3)
(3)
(5)

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