mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 134

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
Data Sheet
134
ADDRESS BUS
INTERRUPT
BUSCLKX4
NOTE:
NOTE:
The SIM disables the oscillator signals (BUSCLKX2 and BUSCLKX4) in stop
mode, stopping the CPU and peripherals. Stop recovery time is selectable using
the SSREC bit in the configuration register 1 (CONFIG1). If SSREC is set, stop
recovery is reduced from the normal delay of 4096 BUSCLKX4 cycles down to 32.
This is ideal for the internal oscillator, RC oscillator, and external oscillator options
which do not require long start-up times from stop mode.
External crystal applications should use the full stop recovery time by clearing the
SSREC bit.
The SIM counter is held in reset from the execution of the STOP instruction
until the beginning of stop recovery. It is then used to time the recovery period.
Figure 14-18
mode recovery time from interrupt or break
To minimize stop current, all pins configured as inputs should be driven to a logic 1
or logic 0.
ADDRESS BUS
Figure 14-19. Stop Mode Recovery from Interrupt
DATA BUS
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
Freescale Semiconductor, Inc.
For More Information On This Product,
STOP +1
R/W
shows stop mode entry timing and
System Integration Module (SIM)
Go to: www.freescale.com
STOP ADDR
Figure 14-18. Stop Mode Entry Timing
STOP + 2
PREVIOUS DATA
STOP RECOVERY PERIOD
STOP ADDR + 1
STOP + 2
NEXT OPCODE
SP
Figure 14-19
SAME
SP – 1
MC68HC908QF4 — Rev. 1.0
SAME
SP – 2
shows the stop
SAME
SP – 3
MOTOROLA
SAME

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