mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 168

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Development Support
16.3.1.2 Forced Monitor Mode
16.3.1.3 Monitor Vectors
Data Sheet
168
NOTE:
NOTE:
If entering monitor mode without high voltage on IRQ, then startup port pin
requirements and conditions, (PTA1/PTA4) are not in effect. This is to reduce
circuit requirements when performing in-circuit programming.
If the reset vector is blank and monitor mode is entered, the chip will see an
additional reset cycle after the initial power-on reset (POR). Once the reset vector
has been programmed, the traditional method of applying a voltage, V
must be used to enter monitor mode.
If monitor mode was entered as a result of the reset vector being blank, the COP
is always disabled regardless of the state of IRQ.
If the voltage applied to the IRQ is less than V
in user mode. Internal circuitry monitors the reset vector fetches and will assert an
internal reset if it detects that the reset vectors are erased ($FF). When the MCU
comes out of reset, it is forced into monitor mode without requiring high voltage on
the IRQ pin. Once out of reset, the monitor code is initially executing with the
internal clock at its default frequency.
If IRQ is held high, all pins will default to regular input port functions except for
PTA0 and PTA5 which will operate as a serial communication port and OSC1 input
respectively (refer to
external source through OSC1 pin.
If IRQ is held low, all pins will default to regular input port function except for PTA0
which will operate as serial communication port. Refer to
Regardless of the state of the IRQ pin, it will not function as a port input pin in
monitor mode. Bit 2 of the Port A data register will always read 0. The BIH and BIL
instructions will behave as if the IRQ pin is enabled, regardless of the settings in
the configuration register. See
The COP module is disabled in forced monitor mode. Any reset other than a
power-on reset (POR) will automatically force the MCU to come back to the forced
monitor mode.
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt),
and break interrupt than those for user mode. The alternate vectors are in the $FE
page instead of the $FF page and allow code execution from the internal monitor
firmware instead of user code.
Exiting monitor mode after it has been initiated by having a blank reset vector
requires a power-on reset (POR). Pulling RST (when RST pin available) low will
not exit monitor mode in this situation.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Development Support
Figure
16-12). That will allow the clock to be driven from an
Section 5. Configuration Register
TST
, the MCU will come out of reset
Figure
MC68HC908QF4 — Rev. 1.0
16-13.
(CONFIG).
TST
MOTOROLA
, to IRQ

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