mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 89

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mc68hc908qf4

Manufacturer Part Number
mc68hc908qf4
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
10.3.4 LVI Trip Selection
10.4 LVI Status Register
MC68HC908QF4 — Rev. 1.0
MOTOROLA
NOTE:
The LVDLVR bit in the configuration register selects whether the LVI is configured
for LVD (low voltage detect) or LVR (low voltage reset) protection. The LVD trip
voltage can be used as a low voltage warning. The LVR trip voltage will commonly
be configured as a reset condition since it is very close to the minimum operating
voltage of the device. The LVDLVR bit can be written to anytime so that battery
applications can make use of the LVI as both a warning indicator and to generate
a system reset.
Polling and forced reset operation modes can be combined to take full advantage
of LVD and LVR trip voltages selection. LVD (LVDLVR = 1) in polling mode
(LVIRSTD = 1) can be used as a low voltage warning in a slowly and continuously
falling V
identified, the part can be set to LVR (LVDLVR = 0) and reset enabled
(LVIRSTD = 0). So, as V
voltage is reached. Unlike other bits in CONFIG registers, LVIRSTD and LVDLVR
bits are allowed to be written multiple times after reset.
The microcontroller is guaranteed to operate at a minimum supply voltage. The trip
point (V
Electrical Characteristics
The LVI status register (LVISR) indicates if the V
the V
LVIOUT — LVI Output Bit
Address: $FE0C
This read-only flag becomes set when the V
trip voltage and is cleared when V
in these threshold levels results in a hysteresis that prevents oscillation into and
out of reset (see
Reset:
Read:
Write:
TRIPF
Freescale Semiconductor, Inc.
TRIPF
DD
For More Information On This Product,
level while LVI resets have been disabled
application (for example, battery applications). Once LVD has been
LVIOUT
Bit 7
[LVD] or V
0
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= Unimplemented
Figure 10-2. LVI Status Register (LVISR)
Low-Voltage Inhibit (LVI)
Table
6
0
0
TRIPF
DD
10-1). Reset clears the LVIOUT bit.
for the actual trip point voltages.
continues to fall the part will reset when LVR trip
[LVR]) may be lower than this. See
5
0
0
DD
voltage rises above V
4
0
0
DD
DD
R
3
0
0
voltage falls below the V
voltage was detected below
.
= Reserved
2
0
0
Low-Voltage Inhibit (LVI)
TRIPR
LVI Status Register
17.5 DC
. The difference
1
0
0
Data Sheet
TRIPF
Bit 0
R
0
89

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