mc68hc908qf4 Freescale Semiconductor, Inc, mc68hc908qf4 Datasheet - Page 158

• Manufacturer Part Number: mc68hc908qf4
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Development Support
16.2.1.1 Flag Protection During Break Interrupts
16.2.1.2 TIM During Break Interrupts
16.2.1.3 COP During Break Interrupts
Data Sheet
158
CAUTION:
When the internal address bus matches the value written in the break address
registers or when software writes a 1 to the BRKA bit in the break status and control
register, the CPU starts a break interrupt by:
The break interrupt timing is:
By updating a break address and clearing the BRKA bit in a break interrupt routine,
a break interrupt can be generated continuously.
A break address should be placed at the address of the instruction opcode. When
software does not change the break address and clears the BRKA bit in the first
break interrupt routine, the next break interrupt will not be generated after exiting
the interrupt routine even when the internal address bus matches the value written
in the break address registers.
The system integration module (SIM) controls whether or not module status bits
can be cleared during the break state. The BCFE bit in the break flag control
register (BFCR) enables software to clear status bits during the break state. See
16.2.2.5 Break Flag Control Register
each module.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt with monitor mode when BDCOP bit
is set in break auxiliary register (BRKAR).
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Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and $FEFD
in monitor mode)
When a break address is placed at the address of the instruction opcode,
the instruction is not executed until after completion of the break interrupt
routine.
When a break address is placed at an address of an instruction operand, the
instruction is executed before the break interrupt.
When software writes a 1 to the BRKA bit, the break interrupt occurs just
before the next instruction is executed.
Freescale Semiconductor, Inc.
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Development Support
and the Break Interrupts subsection for
MC68HC908QF4 — Rev. 1.0
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