at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 220

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at91sam9263

Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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21.11.2
Figure 21-26. Write Access with NWAIT Assertion in Frozen Mode (EXNW_MODE = 10)
220
internally synchronized
NBS0, NBS1,
NBS2, NBS3,
A0,A1
NWAIT signal
AT91SAM9263 Preliminary
Frozen Mode
D[31:0]
NWAIT
A
NWE
[25:2]
MCK
NCS
6
When the external device asserts the NWAIT signal (active low), and after internal synchroniza-
tion of this signal, the SMC state is frozen, i.e., SMC internal counters are frozen, and all control
signals remain unchanged. When the resynchronized NWAIT signal is deasserted, the SMC
completes the access, resuming the access from the point where it was stopped. See
26. This mode must be selected when the external device uses the NWAIT signal to delay the
access and to freeze the SMC.
The assertion of the NWAIT signal outside the expected period is ignored as illustrated in
21-27.
4
5
4
3
3
2
1
2
Write cycle
EXNW_MODE = 10 (Frozen)
WRITE_MODE = 1 (NWE_controlled)
NWE_PULSE = 5
NCS_WR_PULSE = 7
1
2
FROZEN STATE
1
2
1
2
1
0
0
6249D–ATARM–20-Dec-07
Figure 21-
Figure

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