at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 315
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at91sam9263
Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9263.pdf
(1065 pages)
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24.4.9
Name: DMAC_DSRx
Access: Read/Write
Reset: 0x0
The address offset for each channel is: 0x50+[x * 0x58]
For example, DSR0: 0x050, DSR1: 0x0a8, etc.
The DMAC_CTLx.DINC field controls whether the address increments or decrements. When the DMAC_CTLx.DINC field
indicates a fixed address control then the address remains constant throughout the transfer and the DMAC_DSRx register
is ignored.
• DSI: Destination Scatter Interval
Destination scatter interval field (DMAC_DSRx.DSI) – specifies the destination address increment/decrement in multiples
of DMAC_CTLx.DST_TR_WIDTH on a scatter boundary when scatter mode is enabled for the destination transfer.
• DSC: Destination Scatter count
Destination scatter count field (DMAC_DSRx.DSC) – specifies the number of contiguous destination transfers of
DMAC_CTLx.DST_TR_WIDTH between successive scatter boundaries.
6249D–ATARM–20-Dec-07
31
23
15
–
7
Destination Scatter Register for Channel x
30
22
14
–
6
DSC
29
21
13
–
5
28
20
12
–
4
DSI
DSI
27
19
11
–
3
AT91SAM9263 Preliminary
26
18
10
–
2
DSI
25
17
–
9
1
24
16
–
8
0
315
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