at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 875

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

43.5.2.8
6249D–ATARM–20-Dec-07
Timegen
For a more detailed description of the fields, see
page
For a more detailed description of the LCD Interface, see
The time generator block generates the control signals LCDDOTCK, LCDHSYNC, LCDVSYNC,
LCDDEN, used by the LCD module. This block is programmable in order to support different
types of LCD modules and obtain the output clock signals, which are derived from the LCDC
Core clock.
The LCDDOTCK signal is used to clock the data into the LCD drivers' shift register. The data is
sent through LCDD[23:0] synchronized by default with LCDDOTCK falling edge (rising edge can
be selected). The CLKVAL field of LCDCON1 register controls the rate of this signal. The divisor
can also be bypassed with the BYPASS bit in the LCDCON1 register. In this case, the rate of
LCDDOTCK is equal to the frequency of the LCDC Core clock. The minimum period of the LCD-
DOTCK signal depends on the configuration. This information can be found in
The LCDDOTCK signal has two different timings that are selected with the CLKMOD field of the
LCDCON2 register:
Table 43-11. Minimum LCDDOTCK Period in LCDC Core Clock Cycles
The LCDDEN signal indicates valid data in the LCD Interface.
After each horizontal line of data has been shifted into the LCD, the LCDHSYNC is asserted to
cause the line to be displayed on the panel.
DISTYPE
TFT
STN Mono
STN Mono
STN Mono
STN Mono
STN Color
STN Color
STN Color
STN Color
• Always Active (used with TFT LCD Modules)
• Active only when data is available (used with STN LCD Modules)
891.
f
LCDDOTCK
SCAN
Single
Single
Dual
Dual
Single
Single
Dual
Dual
Configuration
=
------------------------------- -
2
f
LCDC_clock
×
CLKVAL
AT91SAM9263 Preliminary
IFWIDTH
4
8
8
16
4
8
8
16
“LCD Controller (LCDC) User Interface” on
“LCD Interface” on page
LCDDOTCK Period
1
4
8
8
16
2
2
4
6
Table
880.
43-11.
875