at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 327

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

24.4.21
Name: DMAC_LstDstReqReg
Access: Read/write
Reset: 0x0
A bit is assigned for each channel in this register. LstDstReqReg[n] is ignored when software handshaking is not enabled
for the source of channel n.
A channel LSTDST bit is written only if the corresponding channel write enable bit in the LSTDS_WE field is asserted on
the same AMBA write transfer.
• LSTDST[1:0]: Destination Last Transaction request
• LSTDS_WE[9:8]: Destination Last Transaction request write enable
0 = Write disabled
1 = Write enabled
6249D–ATARM–20-Dec-07
31
23
15
–
–
–
7
–
Last Destination Transaction Request Register
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
AT91SAM9263 Preliminary
26
18
10
–
–
–
2
–
LSTDS_WE1
LSTDST1
25
17
–
–
9
1
LSTDS_WE0
LSTDST0
24
16
–
–
8
0
327