at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 897

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at91sam9263

Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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43.11.8
Name: DMACON
Access: Read/Write
Reset value: 0x00000000
• DMAEN: DMA Enable
0: DMA is disabled.
1: DMA is enabled.
• DMARST: DMA Reset (Write-only)
0: No effect.
1: Reset DMA module. DMA Module should be reset only when disabled and in idle state.
• DMABUSY: DMA Busy
0: DMA module is idle.
1: DMA module is busy (doing a transaction on the AHB bus).
• DMAUPDT: DMA Configuration Update
0: No effect
1: Update DMA Configuration
addressing. The values written in the registers DMABADDR1, DMABADDR2 and DMA2DCFG, and in the field FRMSIZE of
register DMAFRMCFG, are accepted by the DMA controller and are applied at the next frame. This bit is used only if a dual
scan configuration is selected (bit SCANMOD of LCDCON2 register) or 2D addressing is enabled (bit DMA2DEN in this
register). Otherwise, the LCD controller accepts immediately the values written in the registers referred to above.
• DMA2DEN: DMA 2D Adressing Enable
0: 2D adressing is disabled (values in register DMA2DCFG are “don’t care”).
1: 2D adressing is enabled.
6249D–ATARM–20-Dec-07
31
23
15
7
DMA Control Register
30
22
14
6
.
Used for simultaneous updating of DMA parameters in dual scan mode or when using 2D
29
21
13
5
DMA2DEN
28
20
12
4
DMAUPDT
27
19
11
3
AT91SAM9263 Preliminary
DMABUSY
26
18
10
2
DMARST
25
17
9
1
DMAEN
24
16
8
0
897

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