at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 72

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 12-5.
6249D–ATARM–20-Dec-07
Memory Decoder Inputs
FIFO
Half-rate Clocking Mode
Half-rate Clocking Mode
The eight memory map decoder inputs are connected to custom address decoders. The
address decoders divide the memory into regions of on-chip SRAM, on-chip ROM, and peripher-
als. The address decoders also optimize the ETM9 trace trigger.
Table 12-2.
A 45-byte FIFO is used to store data tracing. The FIFO is used to separate the pipeline status
from the trace packet. So, the FIFO can be used to buffer trace packets.
A FIFO overflow is detected by the embedded trace macrocell when the FIFO is full or when the
FIFO has less bytes than the user-programmed number.
The ETM9 is implemented in half-rate mode that allows both rising and falling edge data tracing
of the trace clock.
The half-rate mode is implemented to maintain the signal clock integrity of high speed systems
(up to 100 MHz).
Care must be taken on the choice of the trace capture system as it needs to support half-rate
clock functionality.
Product Resource
SRAM
SRAM
ROM
ROM
External Bus Interface
External Bus Interface
User Peripherals
System Peripherals
ARM920T Clock
Trace Clock
TraceData
ETM Memory Map Inputs Layout
Area
Internal
Internal
Internal
Internal
External
External
Internal
Internal
Half-rate Clocking Mode
Access Type
Data
Fetch
Data
Fetch
Data
Fetch
Data
Data
AT91SAM9263 Preliminary
Start Address
0x0000 0000
0x0000 0000
0x0040 0000
0x0040 0000
0x1000 0000
0x1000 0000
0xF000 0000
0xFFFF C000
End Address
0x002F FFFF
0x002F FFFF
0x004F FFFF
0x004F FFFF
0x9FFF FFFF
0x9FFF FFFF
0xFFFF BFFF
0xFFFF FFFF
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