at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 248

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

22.5.7
Figure 22-7. Low-power Mode Behavior
248
SDRAMC_A[12:0]
SDCKE
D[31:0]
(input)
SDCS
SDCK
AT91SAM9263 Preliminary
Low-power Mode
RAS
CAS
This mode is selected by programming the LPCB field to 2 in the SDRAMC Low Power Register.
Power consumption is greater than in self-refresh mode. All the input and output buffers of the
SDRAM device are deactivated except SDCKE, which remains low. In contrast to self-refresh
mode, the SDRAM device cannot remain in low-power mode longer than the refresh period (64
ms for a whole device refresh operation). As no auto-refresh operations are performed by the
SDRAM itself, the SDRAM Controller carries out the refresh operation. The exit procedure is
faster than in self-refresh mode.
This is described in
Row n
T
RCD
= 3
col a
Figure
CAS = 2
22-7.
col b
Dna
col c
Dnb
col d
Dnc
col e
Dnd
col f
Dne
Dnf
6249D–ATARM–20-Dec-07
Low Power Mode