at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 286

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 24-8. DMA Transfer Flow for Source and Destination Linked List Address
24.3.5.4
6249D–ATARM–20-Dec-07
Multi-block Transfer with Source Address Auto-reloaded and Destination Address Auto-reloaded (Row 4)
Block Complete interrupt
generated here
DMAC transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose an available (disabled) channel.
2. Clear any pending interrupts on the channel from the previous DMA transfer by writing
3. Program the following channel registers:
to the Interrupt Clear registers: DMAC_ClearTfr, DMAC_ClearBlock,
DMAC_ClearSrcTran, DMAC_ClearDstTran, DMAC_ClearErr. Reading the Interrupt
Raw Status and Interrupt Status registers confirms that all interrupts have been
cleared.
DMAC State Machine Table?
SARx, DARx, CTLx, LLPx
Hardware reprograms
DMAC block transfer
Channel Disabled by
Channel enabled by
Source/destination
status fetch
Is DMAC in
LLI Fetch
hardware
Row1 of
software
yes
AT91SAM9263 Preliminary
no
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