at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 320

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

24.4.14
Name: DMAC_ClearTfr, DMAC_ClearBlock, DMAC_ClearSrcTran, DMAC_ClearDstTran,DMAC_ClearErr
Access: Write
Reset: 0x0
The address offset are
DMAC_ClearTfr: 0x338
DMAC_ClearBlock: 0x340
DMAC_ClearSrcTran: 0x348
DMAC_ClearDstTran: 0x350
DMAC_ClearErr: 0x358
• CLEAR[1:0]: Interrupt Clear
0 = No effect
1 = Clear interrupt
Each bit in the Raw Status and Status registers is cleared on the same cycle by writing a 1 to the corresponding location in
the Clear registers: DMAC_ClearTfr, DMAC_ClearBlock, DMAC_ClearSrcTran, DMAC_ClearDstTran, DMAC_ClearErr.
Each Interrupt Clear register has a bit allocated per channel, for example, DMAC_ClearTfr[2] is the clear bit for Channel 2’s
transfer complete interrupt. Writing a 0 has no effect. These registers are not readable.
6249D–ATARM–20-Dec-07
31
23
15
–
–
–
7
–
Interrupt Clear Registers
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
AT91SAM9263 Preliminary
26
18
10
–
–
–
2
–
CLEAR1
25
17
–
–
9
–
1
CLEAR0
24
16
–
–
8
–
0
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