at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 673

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

6249D–ATARM–20-Dec-07
All interrupts are cleared by clearing the interrupt source except for the internal timer counter
overflow interrupt and the timestamp interrupt. These interrupts are cleared by reading the
CAN_SR register.
– Error-active Mode: The CAN module is neither in Error Passive Mode nor in Bus-off
– Warn Limit interrupt: The CAN module is in Error-active Mode, but at least one of its
– Wake-up interrupt: This interrupt is generated after a wake-up and a bus
– Sleep interrupt: This interrupt is generated after a Low-power Mode enable once all
– Internal timer counter overflow interrupt: This interrupt is generated when the
– Timestamp interrupt: This interrupt is generated after the reception or the
mode.
error counter value exceeds 96.
synchronization.
pending messages in transmission have been sent.
internal timer rolls over.
transmission of a start of frame or an end of frame. The value of the internal counter
is copied in the CAN_TIMESTP register.
AT91SAM9263 Preliminary
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