cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 128

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cx82100

Manufacturer Part Number
cx82100
Description
Home Network Processor Hnp
Manufacturer
Conexant Systems, Inc.
Datasheet

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7.11.3
7-30
Bit(s)
29:28
17:16
31
30
27
26
25
24
23
22
21
20
19
18
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
EMAC x Network Access Register (E_NA_1: 0x00310004 and E_NA_2:
0x00320004)
Default
2’b00
1’b1
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b1
1’b0
1’b0
1’b0
Conexant Proprietary and Confidential Information
E_NA_1 and E_NA_2 are the EMAC Network Access registers for EMAC1 and
EMAC2, respectively.
E_NA_HP
E_NA_HO
E_NA_IF
E_NA_RRX
E_NA_DIS
E_NA_RUT
E_NA_RTX
E_NA_STOP
E_NA_PR
E_NA_PM
E_NA_PB
E_NA_THU
E_NA_IFG
CX82100 Home Network Processor Data Sheet
Name
TX Software Reset.
Stop Transmit Control.
Unused.
Hash/Perfect Address Filter Mode Control.
E_NA_HP, E_NA_HO, E_NA_IF, E_NA_PR, E_NA_PM should be
programmed according to Table 7-7 to select the desired address
filtering mode.
Hash Only Control.
See E_NA_HP for description.
Inverse Filter Control.
See E_NA_HP for description.
Promiscuous Mode Control.
See E_NA_HP for description.
Pass All Multicast.
See E_NA_HP for description.
Pass Bad Packet Control.
RX Software Reset.
TX Test HUJ Control.
TX Disable Back-Off Counter Control.
TX Reset Unit Timer Control.
Interframe Gap (IFG) Period Select.
Value is read as an integer and substitutes E_NA_IFG in the following
equations:
0 = No effect.
1 = Once 1 is written, write 0 into field to get out of reset. All internal
0 = No effect.
1 = Stop the transmitter after the current frame (if any).
0 = Disable.
1 = Receive any packets, if pass address filter, including runt
0 = No effect.
1 = Once 1 is written, write 0 into field to get out of reset. All internal
100 Mbps: IFG = 960 – 40* E_NA_IFG ns
10 Mbps: IFG = 9600 – 40* E_NA_IFG ns
registers of RX and TX (including all bits of this register) are
reset to their default value.
packets, CRC error, truncated packets.
RX registers are reset to their default value. This bit can only be
cleared after E_NA_RTX bit is cleared.
Description
101306C

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