cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 39

• Manufacturer Part Number: cx82100
• Description: Home Network Processor Hnp
• Manufacturer: Conexant Systems, Inc.

Table 2-3. CX82100 HNP Pin Signal Definitions (Continued)
101306C
USBP
USBN
USB_PWR_DET
(GPIO22)
TRST#
TCK
TMS
TDI
TDO
TREQA
Pin Signal
D9
E8
C9
J4
K2
J6
K1
K3
K5
Pin No.
Conexant Proprietary and Confidential Information
CX82100 Home Network Processor Data Sheet
Test Interface Controller (TIC) [Factory Test Only]
I/O
I
I
I
I
I
O
I
I/O
Iu/Ou
It/Ot4
Itpu
Itpu
Itpu
Itpu
Otts4
Itpd
I/O Type
JTAG Interface
USB Interface
USB Port. USBP and USBN are the differential data positive and
negative signals of the USB port. Connect USBP and USBN to
USB +Data and -Data, respectively, through 24 Ω, and optionally
through a quick switch in order to isolate the USBP and USBN from
the USB during suspend mode.
USB Power Detect. Active high input used to detect presence of
+5 V at the USB connector.
JTAG Reset. A high-to-low transition on this signal forces the TAP
controller into a logic reset state. This pin has an internal pullup.
Leave open for normal operation.
JTAG Test Clock. This is the boundary scan clock input signal.
This pin has an internal pullup.
Leave open for normal operation.
JTAG Test Mode Select. This signal controls the operation of the
TAP controller. This pin has an internal pull-up.
Leave open for normal operation.
JTAG Test Input. This signal contains serial data that is shifted in
on the rising edge of TCK. The pin has an internal pullup.
Leave open for normal operation.
JTAG Test Output Data. This is the three-stateable boundary scan
data output signal from the MCU, and it is shifted out on the falling
edge of TCK.
Leave open for normal operation.
Reserved. This pin is connected to internal circuitry. Leave open.
Signal Name/Description
2-9