MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 180

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Monitor ROM (MON)
12.4.1 Entering monitor mode
Advance Information
180
NOTE:
1. For V
V
V
HI
HI
(1)
(1)
HI
,
5.0 Volt DC Electrical Characteristics
Table 12-1
Enter monitor mode by either
Once out of reset, the MCU waits for the host to send eight security bytes
(see
break signal (10 consecutive ‘0’s) to the host computer, indicating that it
is ready to receive a command.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt.
The alternate vectors are in the $FE page instead of the $FF page and
allow code execution from the internal monitor firmware instead of user
code. The COP module is disabled in monitor mode as long as V
Electrical Specifications on page 445), is applied to either the IRQ pin
or the RST pin. See
more information on modes of operation.
Holding the PTC3 pin low when entering monitor mode causes a bypass
of a divide-by-two stage at the oscillator. The CGMOUT frequency is
equal to the CGMXCLK frequency, and the OSC1 input directly
generates internal bus clocks. In this case, the OSC1 signal must have
a 50% duty cycle at maximum bus frequency.
1
1
•
•
Security
Executing a software interrupt instruction (SWI) or
Applying a ‘0’ and then a ‘1’ to the RST pin.
0
0
1
1
shows the pin conditions for entering monitor mode.
on page 186). After the security bytes, the MCU sends a
Monitor ROM (MON)
1
0
Table 12-1. Mode Selection
System Integration Module (SIM)
Monitor
Monitor
Mode
on page 448, and
CGMXCLK
---------------------------- -
2
CGMXCLK
CGMOUT
Maximum Ratings
or
CGMVCLK
---------------------------- -
MC68HC08AZ60A — Rev 0.0
2
on page 117 for
on page 446.
Frequency
MOTOROLA
CGMOUT
------------------------- -
CGMOUT
------------------------- -
Bus
HI
2
2
(see