MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 88

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
EEPROM-2
Advance Information
88
NOTE:
A. Setting the EELAT bit configures the address and data buses to latch
data for erasing the array. Only valid EEPROM-2 addresses will be
latched. If EELAT is set, other writes to the EE2CR will be allowed after
a valid EEPROM-2 write.
B. If more than one valid EEPROM-2 write occurs, the last address and
data will be latched overriding the previous address and data. Once data
is written to the desired address, do not read EEPROM-2 locations other
than the written location. (Reading an EEPROM-2 location returns the
latched data and causes the read address to be latched).
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-
valid EEPROM-2 address is latched. This is to ensure proper
programming sequence. Once EEPGM is set, do not read any
EEPROM-2 locations; otherwise, the current program cycle will be
unsuccessful. When EEPGM is set, the on-board programming
sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t
time may be different. For forward compatibility, software should not
make any dependency on this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of
high voltage from the EEPROM-2 array.
4. Wait for a time: t
5. Clear EEPGM bit.
6. Wait for a time, t
7. Poll the EEPGM bit until it is cleared by the internal timer.
8. Clear EELAT bits.
EEBYTE
t
EEBULK.
/t
EEBLOCK
for bulk erase.
EEPROM-2
EEFPV
EEBYTE
/t
(E)
EEBULK
, for the erasing voltage to fall. Go to Step 8.
for byte erase; t
. However, on other MCUs, this delay
EEBLOCK
MC68HC08AZ60A — Rev 0.0
for block erase;
MOTOROLA
(D)

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