MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 388

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MSCAN08 Controller (MSCAN08)
21.14.8 MSCAN08 Transmitter Control Register
Advance Information
388
NOTE:
NOTE:
Address:
To ensure data integrity, no registers of the transmit buffers should be
written to while the associated TXE flag is cleared.
The CTFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
ABTRQ2–ABTRQ0 — Abort Request
Reset:
Read:
Write:
aborted due to a pending abort request (see
Priority Registers
pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx flag
(ABTAK, see above). When a TXEx flag is set, the corresponding
ABTRQx bit (ABTRQ, see
is cleared.
The CPU sets an ABTRQx bit to request that an already scheduled
message buffer (TXE = 0) be aborted. The MSCAN08 will grant the
request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a
message is aborted the associated TXE and the abort acknowledge
flag (ABTAK) (see
1 = The associated message buffer is empty (not scheduled).
0 = The associated message buffer is full (loaded with a message
Figure 21-22. Transmitter Control Register (CTCR)
$0507
Bit 7
due for transmission).
MSCAN08 Controller (MSCAN08)
0
0
ABTRQ2 ABTRQ1 ABTRQ0
= Unimplemented
6
0
MSCAN08 Transmitter Flag Register
on page 374). If not masked, a receive interrupt is
5
0
MSCAN08 Transmitter Control
4
0
3
0
0
MC68HC08AZ60A — Rev 0.0
Transmit Buffer
TXEIE2
2
0
TXEIE1
1
0
MOTOROLA
Register)
on page
TXEIE0
Bit 0
0