MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 266

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Serial Peripheral Interface (SPI)
17.8 Queuing Transmission Data
Advance Information
266
ERRIE
MODF
OVRF
Figure 17-9. SPI Interrupt Request Generation
Two sources in the SPI status and control register can generate CPU
interrupt requests:
The double-buffered transmit data register allows a data byte to be
queued and transmitted. For an SPI configured as a master, a queued
data byte is transmitted immediately after the previous transmission has
completed. The SPI transmitter empty flag (SPTE) indicates when the
transmit data buffer is ready to accept new data. Write to the SPI data
register only when the SPTE bit is high.
associated with doing back-to-back transmissions with the SPI (SPSCK
has CPHA: CPOL = 1:0).
•
•
SPTE
SPI receiver full bit (SPRF) — the SPRF bit becomes set every
time a byte transfers from the shift register to the receive data
register. If the SPI receiver interrupt enable bit, SPRIE, is also set,
SPRF can generate an SPI receiver/error CPU interrupt request.
SPI transmitter empty (SPTE) — the SPTE bit becomes set every
time a byte transfers from the transmit data register to the shift
register. If the SPI transmit interrupt enable bit, SPTIE, is also set,
SPTE can generate an SPTE CPU interrupt request.
SPRIE
Serial Peripheral Interface (SPI)
SPTIE
SPRF
SPE
SPI TRANSMITTER
CPU INTERRUPT REQUEST
Figure 17-10
SPI RECEIVER/ERROR
CPU INTERRUPT REQUEST
MC68HC08AZ60A — Rev 0.0
shows the timing
MOTOROLA