MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 277

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC08AZ60A — Rev 0.0
MOTOROLA
SPSCR
Reset:
Read:
Write:
The SPI status and control register also contains bits that perform the
following functions:
SPRF — SPI Receiver Full
ERRIE — Error Interrupt Enable
OVRF — Overflow Flag
Figure 17-13. SPI Status and Control Register (SPSCR)
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This clearable, read-only flag is set each time a byte transfers from
the shift register to the receive data register. SPRF generates a CPU
interrupt request if the SPRIE bit in the SPI control register is set also.
During an SPRF CPU interrupt, the CPU clears SPRF by reading the
SPI status and control register with SPRF set and then reading the
SPI data register. Any read of the SPI data register clears the SPRF
bit.
Reset clears the SPRF bit.
This read-only bit enables the MODF and OVRF flags to generate
CPU interrupt requests. Reset clears the ERRIE bit.
This clearable, read-only flag is set if software does not read the byte
in the receive data register before the next byte enters the shift
register. In an overflow condition, the byte already in the receive data
SPRF
1 = Receive data register full
0 = Receive data register not full
1 = MODF and OVRF can generate CPU interrupt requests
0 = MODF and OVRF cannot generate CPU interrupt requests
Bit 7
Enable error interrupts
Enable mode fault error detection
Select master SPI baud rate
R
0
Serial Peripheral Interface (SPI)
= Reserved
ERRIE
6
0
OVRF
5
0
MODF
4
0
SPTE
= Unimplemented
3
1
Serial Peripheral Interface (SPI)
MODFE
N
2
0
Advance Information
SPR1
1
0
I/O Registers
SPR0
Bit 0
0
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