MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 443

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
ADICLK — ADC Input Clock Register Bit
During the conversion process, changing the ADC clock will result in an
incorrect conversion.
ADICLK selects either bus clock or CGMXCLK as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK
as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz,
CGMXCLK can be used as the clock source for the ADC. If
CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as
the clock source. As long as the internal ADC clock is at
approximately 1 MHz, correct operation can be guaranteed. See
Electrical Specifications
1 = Internal bus clock
0 = External clock (CGMXCLK)
Analog-to-Digital Converter (ADC-15)
X = don’t care
ADIV2
1 MHz =
0
0
0
0
1
Table 24-2. ADC Clock Divide Ratio
ADIV1
X
0
0
1
1
f
XCLK
on page 445.
or Bus Frequency
ADIV0
ADIV[2:0]
X
0
1
0
1
Analog-to-Digital Converter (ADC-15)
ADC Input Clock / 16
ADC Input Clock / 2
ADC Input Clock / 4
ADC Input Clock / 8
ADC Input Clock /1
ADC Clock Rate
Advance Information
I/O Registers
443

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