MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 440

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Analog-to-Digital Converter (ADC-15)
Advance Information
440
NOTE:
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH[4:0] — ADC Channel Select Bits
Recovery from the disabled state requires one conversion cycle to
stabilize.
If the AIEN bit is a logic 1, the COCO is a read/write bit which selects
the CPU to service the ADC interrupt request. Reset clears this bit.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the
ADR register at the end of each conversion. Only one conversion is
allowed when this bit is cleared. Reset clears the ADCO bit.
ADCH4, ADCH3, ADCH2, ADCH1, and ADCH0 form a 5-bit field
which is used to select one of 15 ADC channels. Channel selection is
detailed in the following table. Care should be taken when using a port
pin as both an analog and a digital input simultaneously to prevent
switching noise from corrupting the analog signal. See
The ADC subsystem is turned off when the channel select bits are all
set to one. This feature allows for reduced power consumption for the
MCU when the ADC is not used. Reset sets these bits.
1 = conversion completed (AIEN = 0)
0 = conversion not completed (AIEN = 0)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Analog-to-Digital Converter (ADC-15)
CPU interrupt enabled (AIEN = 1)
or
MC68HC08AZ60A — Rev 0.0
Table
MOTOROLA
24-1.

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