HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 130

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HD6413308

Manufacturer Part Number
HD6413308
Description
Hitachi Single-Chip MicroComputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Port 9 Data Direction Register (P9DDR)—H’FFC0
Bit
Modes 1 and 2
Mode 3
P9DDR is an 8-bit register that selects the direction of each pin in port 9. A pin functions as an
output pin if the corresponding bit in P9DDR is set to “1,” and as in input pin if the bit is cleared to
“0.”
Port 9 Data Register (P9DR)—H’FFC1
Bit
Initial value
Read/Write
P9DR is an 8-bit register containing the data for pins P9
output pins (P9DDR = "1") it reads the value in the P9DR latch, but for input pins (P9DDR = "0"),
it obtains the logic level directly from the pin, bypassing the P9DR latch. This also applies to pins
used for interrupt input, A/D trigger input, clock output, and control signal input or output.
MOS Pull-Ups: Are available for input pins, including pins used for input of interrupt request
signals, the A/D trigger signal, and control signals. Software can turn the MOS pull-up on by
writing a “1” in P9DR, and turn it off by writing a “0.”
Pins P9
or A/D trigger input. See Table 5-18. If a pin is used for interrupt or A/D trigger input, its data
direction bit should be cleared to "0," so that the output from P9DR will not generate an interrupt
request or A/D trigger signal.
Pins P9
RD and WR bus control signals. They are unaffected by the values in P9DDR and P9DR, and their
Initial value
Read/Write
Initial value
Read/Write
0
3
, P9
and P9
1
, and P9
P9
4
: In modes 1 and 2 (the expanded modes), these pins are used for output of the
R/W
7
P9
W
W
DDR P9
7
0
0
7
0
7
2
: Can be used for general-purpose input or output, interrupt request input,
R/W
6
P9
W
DDR P9
6
1
0
6
0
6
R/W
5
P9
W
W
DDR P9
5
0
0
5
0
5
115
R/W
4
P9
W
W
DDR P9
4
0
0
4
0
4
7
to P9
R/W
3
P9
W
W
DDR P9
3
0
0
3
0
3
0
. When the CPU reads P9DR, for
R/W
2
P9
W
W
DDR P9
2
0
0
2
0
2
R/W
1
P9
W
W
DDR P9
1
0
0
1
0
1
R/W
0
P9
W
W
DDR
0
0
0
0
0
0

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