HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 14

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

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Figure 2-1
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Figure 3-10
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Figure 3-16
Figure 3-17(a) External Device Access Timing (read) ................................................................. 56
Figure 3-17(b) External Device Access Timing (write) ................................................................ 57
Figure 4-1
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Figure 5-1
Block Diagram ......................................................................................................
Pin Arrangement (FP-80A, Top View) .................................................................
Pin Arrangement (CP-84, Top View) ....................................................................
Pin Arrangement (CG-84, Top View) ...................................................................
Address Space Map............................................................................................... 20
CPU Registers ....................................................................................................... 26
Stack Pointer ......................................................................................................... 27
Register Data Formats........................................................................................... 32
Memory Data Formats .......................................................................................... 33
Data Transfer Instruction Codes............................................................................ 37
Arithmetic, Logic, and Shift Instruction Codes .................................................... 40
Bit Manipulation Instruction Codes ...................................................................... 46
Branching Instruction Codes................................................................................. 48
System Control Instruction Codes......................................................................... 50
Block Data Transfer Instruction/EEPROM Write Operation Code ...................... 51
Operating States .................................................................................................... 51
State Transitions .................................................................................................... 52
On-Chip Memory Access Cycle ........................................................................... 54
Pin States during On-Chip Memory Access Cycle ............................................... 54
On-Chip Register Field Access Cycle................................................................... 55
Pin States during On-Chip Register Field Access Cycle ...................................... 56
Reset Sequence (Mode 2 or 3, Reset Routine in On-Chip ROM)......................... 61
Reset Sequence (Mode 1)...................................................................................... 62
Block Diagram of Interrupt Controller.................................................................. 66
Hardware Interrupt-Handling Sequence................................................................ 67
Timing of Interrupt Sequence................................................................................ 68
Usage of Stack in Interrupt Handling.................................................................... 74
Example of Damage Caused by Setting an Odd Address in R7 ........................... 75
Example of Deferred Interrupt .............................................................................. 76
Port 1 Schematic Diagram..................................................................................... 81
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