HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 202

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

9.2.8 Bit Rate Register (BRR) – H’FFD9
Bit
Initial value
Read/Write
The BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in the SMR, determines
the baud rate output by the baud rate generator.
The BRR is initialized to H’FF (the slowest rate) at a reset and in the standby modes.
Tables 9-3 and 9-4 show examples of BRR (N) and CKS (n) settings for commonly used bit rates.
Table 9-3. Examples of BRR Settings in Asynchronous Mode (1)
Bit
rate
110
150
300
600
1200
2400
4800
9600
19200 —
31250 —
38400 —
n
1
0
0
0
0
0
—
—
2
N
70
207 +0.16
103 +0.16
51
25
12
—
—
—
—
—
R/W
7
1
Error
(%)
+0.03
+0.16
+0.16
+0.16
—
—
—
—
—
R/W
n
1
0
0
0
0
0
0
0
0
—
0
6
1
XTAL Frequency (MHz)
2.4576
N
86
255 0
127 0
63
31
15
7
3
1
—
0
R/W
5
1
+0.31
0
0
0
0
0
0
—
0
Error
(%)
189
R/W
4
1
n
1
1
0
0
0
0
0
—
—
0
—
R/W
4
N
141
103
207
103
51
25
12
—
—
1
—
3
1
Error
(%)
+0.03
+0.16
+0.16
+0.16
+0.16
+0.16
+0.16
—
—
0
—
R/W
2
1
n
1
1
0
0
0
0
0
—
—
—
—
R/W
1
1
4.194304
N
148
108
217
108
54
26
13
—
—
—
—
R/W
0
1
Error
(%)
–0.04
+0.21
+0.21
+0.21
–0.70
+1.14
–2.48
—
—
—
—